HT1621, a 128 (32x4) pattern LCD driver, is communicated with a host controller through several serial interfaces to light LCD. This chapter introduces how Alpha’s EzCode4Ev4.50 drives HT1621 to display numbers.

 

Command Name	Command Code	D/C	Function  Description	Power-on Reset Default
READ	110 a5 a4 a3 a2 a1 a0 d0 d1 d2 d3	D	Read data from RAM
WRITE	101 a5 a4 a3 a2 a1 a0 d0 d1 d2 d3	D	Write data to RAM
READ-MODIFY-WRITE	101 a5 a4 a3 a2 a1 a0 d0 d1 d2 d3	D	READ and WRITE data to RAM
SYS DIS	10000000000X	C	Turn off both system oscillator and LCD bias generator	√
SYS EN	10000000001X	C	Turn on system oscillator
LCD OFF	10000000010X	C	Turn off LCD bias generator	√
LCD ON	10000000011X	C	Turn on LCD bias generator
TIMER DIS	10000000100X	C	Disable time base output
WDT DIS	10000000101X	C	Disable WDT time-out flag output
TIMER EN	10000000110X	C	Enable time base output
WDT EN	10000000111X	C	Enable WDT time-out flag output
TONE OFF	10000001000X	C	Turn off tone outputs	√
TONE ON	10000001001X	C	Turn off tone outputs
CLR TIMER	100000011XXX	C	Clear value of time base generator
CLR WDT	1000000111XX	C	Clear status of WDT
XTAL 32K	100000101XXX	C	System clock source, crystal oscillator
RC 256K	100000110XXX	C	System clock source, on-chip RC oscillator	√
EXT 256K	100000111XXX	C	System clock source, external clock source

 

Command Name	Command Code	D/C	Function  Description	Power-on Reset Default
BIAS 1/2	1000010abX0X	C	LCD 1/2 bias options: ab=00:2 commons options ab=01:3 commons options ab=10:4 commons options
BIAS 1/3	1000010abX1X	C	LCD 1/3 bias options: ab=00:2 commons options ab=01:3 commons options ab=10:4 commons options
TONE 4K	100010XXXXXX	C	Tone frequency: 4KHz
TONE 2K	100011XXXXXX	C	Tone frequency: 2KHz
/IRQ DIS	100100X0XXXX	C	/IRQ output disable	√
/IRQ EN	100100X1XXXX	C	/IRQ output enable
F1	100101XX000X	C	Time base/WDT clock output: 1Hz
F2	100101XX001X	C	Time base/WDT clock output: 2Hz
F4	100101XX010X	C	Time base/WDT clock output:4Hz
F8	100101XX011X	C	Time base/WDT clock output:8Hz
F16	100101XX100X	C	Time base/WDT clock output:16Hz
F32	100101XX101X	C	Time base/WDT clock output:32Hz
F64	100101XX110X	C	Time base/WDT clock output:64Hz
F128	100101XX111X	C	Time base/WDT clock utput:128Hz	√
TEST	10011100000X	C	Test mode
NORMAL	10011100011X	C	Normal mode	√

 

X: 0 or 1

A5~a0: RAM addresses

D3~d0: RAM data

D/C: Data/Command Mode

 

The commands in the example include Command Mode, Write Mode, Write Successive Address Mode.

 

                  

               

    Figure 1                                Figure 2

 

The 20^th 8 in Target Board of AM4AA is available for LCD.

 

 

 

 

 

 

 

    

                                                Figure 3

The LCD in above circuit diagram is the 20^th 8 in Target Board of AM4AA. ( See AM4AA_Romter_UM for more information).

 

Cyclic numbers displaying after power-on: 0, 1, 2, …9.

 

Power-on ->setting 1621normal mode ->turning on 1621 system oscillator ->setting 1621 system clock source -> selecting 1621 bias and commons options -> turning on 1621 LCD bias generator -> lighting LCDs up -> lighting LCDs out ->cyclic number displaying.

 

Send_com_nibble:  Send 4-bit command codes in sequence of bit3->bit2->bit1->bit0. One command is sent completely after three consecutive times of transfers.

Send_nibble:   Send 4-bit data in sequence of bit0->bit1->bit2->bit3.

Write_ID_address:  Send operation mode and address. Anyone of read data, write data and write command available for selection can be operated under 3-bit mode. The 6-bit address will be sent in descending sequence.